A High-Speed Hardware Implementation of the LILI-II Keystream Generator

The LILI-II keystream generator is a new LFSR based synchronous stream cipher with a 128-bit key. In this paper a high-speed hardware implementation of the LILI-II generator is presented. The proposed architecture is suitable for application with high-performance and area-restricted requirements. Reprogrammable LFSRs are used for the algorithm implementation. With this technique the usage of the LILI-II algorithm is universalized, and different security levels can be achieved. Three FPGA devices are used for the synthesis purposes. A maximum throughput equal to 366 Mbps can be achieved, with a clock frequency of 366 MHz. Finally, comparisons with other previous published implementations of others stream ciphers are given.